Use of universal GPIO

The operation of GPIO in an embedded system is the most basic operation. There is a common GPIO operating interface in Linux.

In the imx6Q board file system there will be a directory to control GPIO: /sys/class/gpio;

Under the Documentation folder in the Linux-3.0.35 kernel is a GPIO .txt documentation to refer to.

• 1. Rutte Friskar/Sith/Klass/Piotr$Ley
• 2. Export Pio Kip 0 Pio Kip 160 Pio Kip 32 Pio Kip 96
• 3. Pioquip 128 Pio kip 192 Piotrip 64 Unexport

Among them, export and unexport are the properties files of the GPIO subsystem, while the remaining seven files are symbolic links (gpiochip0, gpiochip32, gpiochip64, gpiochip96, gpiochip128, gpiochip160, gpiochip192), pointing to their respective GPIO groups. In the case of gpiochip0, the files in this directory are:

Before we can operate a GPIO, we need to write the GPIO number to the port file to export its device directory. The formula for calculating the GPIO number is as follows:

GPIO number= (BANK-1) * 32+N

In the formula, the BANK is the GPIO group number where the GPIO pin is located, and N is the serial number of the pin in that BANK. Take GPIO7-IO03, for example, with a BANK value of 7 and an N value of 3, so the serial number is (7-1) *32 +3 =195.

Here's how to use some of the actions in this directory.

1.GPIO number export

The file system/sys/class/gpio/export file is used to notify the system that the GPIO number to be exported for control: echo 195 >/sys/class/gpio/export

The command succeeds in generating /sys/class/gpio/gpio195 directory. If no directory appears, this pin is not exportable, typically due to incorrect configuration of the pinmux feature in the driver, or conflict caused by the configuration of multiple pinmux functions.

2.Cancel the GPIO number export

File system/sys/class/gpio/unexport file used to notify the system to cancel GPIO number export: echo 195 > /sys/class/gpio/unexport

3.Configure the input and output direction of GPIO

echo out >/sys/class/gpio/gpio195/direction

Direction can receive parameters: in, out, high, low; where high, low sets the direction to output and sets the value value to 1/0.

4.View the GPIO input and output direction:

cat /sys/class/gpio/gpio195/ direction

5.Configure the GPIO's high and low level (value is 1/0)

When gpio is configured for output mode, you can set the high and low level of gpio by setting the value value.

echo 1 >/sys/class/gpio/value

6.View the output value of GPIO

cat /sys/class/gpio/gpio195/value

Modify the Pinmux configuration

Main position in the drive: linux3.0.35/drivers/gpio/gpiolib .c

Modify the file arch/arm/mach-mx6/board-mx6q_sabresd.h to include the gpio configuration for the pin, which, if there are other multiplex configurations, needs to be removed from the other multiplex configurations, leaving only one pinmux configuration. The pin function in the kernel is defined in the arch/arm/plat-mxc/include/mach/iomux-mx6q.h file, which defines the multiplex functionality of each pin and can be seen by interested parties.

Take, for example, the release of some of the pins occupied by the original SD card function:

Modify the file arch/arm/mach-mx6/board-mx6q_c_sabresd.h, with the following definition added:

Comment out the functionality of the original SD card

Before the modification:

After modification:

Once the modification is complete, recompile the kernel and burn the image to the iMX6Q board for testing.

Test

Datasheet view gpio

1. GPIO address

Chapter 28 of the IMX6DQRM .pdf Manual describes GPIO-related content.

Chapter 2 of the manual, Memo Maps Memory Mapping, is approximately 215 pages long and has mapping addresses for GPIO groups:

2. GPIO register

Page 1429 of Chapter 28 of the Data Sheet describes the eight 32-bit registers controlled by GPIO.

3, pin reuse

i.MX6Q Data Sheet 36 IOMUX Controller chapter is interested can also be looked at in detail or from the network to find some relevant information to understand, not detailed here

This section mainly describes the multiplex configuration of the pins and the configuration of some functions, etc., and the configuration of this block in the kernel code is in the linux-3.0.35/arch/arm/plat-mxc/include/mach/iomux-mx6q.h file. The specific configuration in this file is interested in their own look, generally this NXP NXP official is the default configuration, the specific meaning of the configuration items can also be searched from the Internet, and combined with the iomux-mx6q.h file to see for themselves.

4, parameters to find the configuration method

In the fourth chapter of the manual, looking for EIM_A22, you can see that the alt Mode required is ALT5, and the parameters that the Pad Settings need to configure are PKE-ENABLED, corresponding to the Pad Registers for【SW_PAD_CTL_PAD_EIM_ADDR22】

The manual continues to search for the SW_PAD_CTL_PAD_EIM_ADDR22 registers, and you can see the specific configuration of the registers and the specific offset address, as well as the configuration of the pull-up.

The manual looks for the corresponding MUX Control Registers (IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR22). You can see that the configuration value for the specific configuration mode ALT5 mode is 0x05UL.

Appendix: Reference to the handling of common GPIO debugging issues

Reference to common GPIO debugging issues:

1. If The Event of Device or resource busy occurs during GPIO export

This pin is typically configured as a different function in the kernel and requires careful review of the pin configuration in the kernel and not to be consumed by other functions.

2. GPIO can be exported, but when used, various functions are not normal

This situation is also generally the pin in the kernel configured as other functions, need to carefully check the kernel pin configuration, do not be occupied by other functions (generally occupied by serial port will be this case);

There is also to check the hardware circuit, to see if there is a pull-up on the hardware such hardware control.