OK3506J-S Single Board Computer Based on Rockchip RK3506J Processor

3×Cortex-A7，up to 1.5GHz

1×Cortex-M0

GPU

2D GPU

RAM

256MB/512MB DDR3

ROM

256MB Nand Flash/8GB eMMC

Operating Temperature

-40℃ ~+85℃

Working Voltage

DC 5V

Connection

Stamp hole (146 pins in total, pin center spacing 1mm)

Dimensions

44mm×35mm

OS

Linux6.1

Flashing Method

USB OTG

MIPI DSI

≤1

Supports 1 x 2-lane MIPI Display Serial Interface with a speed of 1.5 Gbps per lane.

Built-in VOP controller, supporting only 1 x display output at a time.

RGB

≤1

Supports RGB888 24-bit, with resolution up to 1280x1280@60Hz.

RGB, FLEXBUS, and DSMC interfaces are multiplexed, allowing only one function to be selected at a time.

FLEXBUS

≤1

Supports 1 x flexible parallel FLEXBUS interface, enabling high-speed IO switching.

DSMC

≤1

Supports the DSMC data bus for PSRAM and FPGA communication. FPGA can be expanded through the DSMC interface, with master mode supporting ×8 and ×16 data bits, and slave mode supporting ×8 data bits.

USB 2.0

2

Supports 2 x high-speed USB 2.0 ports, with 1 x USB supporting OTG.

SDMMC

≤1

Supports 1x SDIO, 4 bits; the eMMC version SoM does not have this interface.

Ethernet

2

2 × RMII, 10/100-Mbps, supporting both full-duplex and half-duplex operations

CAN-FD

2

Supports CAN2.0 and CAN-FD

SPI

3

SPI0/SPI1 support both serial master and slave modes, configurable by software; SPI2 supports serial slave mode only.

UART

≤6

Supports 6 x serial communication interfaces, with UART0 serving as the debug serial port.

I2C

3

Supports both 7-bit and 10-bit address modes, as well as master and slave modes, with a maximum speed of up to 1Mbit/s.

Audio

/

4 × SAI(TX 1Lane/RX 1Lane ×2, TX 4Lane/RX 1Lane × 1, TX 1Lane/RX 4Lane × 1)
1 × 4ch PDM
1×SPDIF TX/RX 1×Audio ADC
2 ×Audio DSM

FSPI

≤1

Supports 1 x FSPI interface. By default, the SoM is connected to the SPI NAND FLASH, which supports system startup.

SARADC

≤4

10-bit resolution, with a speed up to 1MS/s, and an input voltage range of 0~1.8V.
SARADC0 is related to the boot-up sequence pins, while SARADC1 is multiplexed for recovery interface function.

PWM

≤11

Supports 12 x PWM interfaces, with 1 x already occupied by the SoM, leaving 11 available for user use.

JTAG

≤1

Supports JTAG SWD interface debugging, multiplexed with the debug serial port UART0 pins.

TOUCH KEY

≤8

Supports 8 x TOUCH KEY

GPIO

≤76

GPI≤70， GPO≤76，among them, the six pins MIPI_DPHY_DSI_TX_D0N/D0P/D1N/D1P/CLKN/CLKP can only be used as General Purpose Outputs (GPO).